NIT Jalandhar

डा बी आर अम्बेडकर राष्ट्रीय प्रौद्योगिकी संस्थान, जालन्धर
Dr B R Ambedkar National Institute of Technology, Jalandhar

AMD Virtex UltraScale+ FPGA VCU118 Evaluation Kit

Department: Department of Electronics and Communication Engineering
Concerned Person:
Name Dr. Ashish Raman
Associate Professor
Department of Electronics and Communication Engineering
Email ID ramana@nitj.ac.in
Mobile No. 9888217273
Location:

3rd Floor ECE Department

Available For:

For Internal Users only

Performa For Booking:
View PDF
Major Specifications:

Configuration

  • Onboard JTAG configuration circuitry to enable configuration over USB
  • JTAG header provided for use with AMD download cables such as the Platform Cable USB II
  • QSPI flash memory

    Communication & Networking

  • 10/100/1000 Mbps Ethernet (SGMII)
  • Two 28 Gb/s QSFP+
  • Samtec FireFly 4x28 Gb/s Interface
  • Dual USB-to-UART Bridge with mico-B USB connector
  • RJ45 Ethernet connector
  • PCI Express endpoint Gen3 x 16

    Expansion Connectors

  • FMC+ HSPC connector (24 – 28 Gb/s GTY Transceivers,  80 differential user defined pairs)
  •  FMC HPC1 connector (58 differential user defined pairs)
  •  PMOD header
  •  IIC

    Control & I/O

  • User Push Buttons (x5)
  • User DIP Switch (4-position)
  • PMBUS & System Controller MSP430 for power, clocks, SD-Card and I2C bus switching
Research Potential:

The Virtex™ UltraScale+™ FPGA VCU118 Evaluation Kit is the ideal development environment for evaluating the cutting edge Virtex UltraScale+ FPGAs. Virtex UltraScale+ devices provide the highest performance and integration capabilities in a FinFET node, including both the highest serial I/O and signal processing bandwidth, as well as the highest on-chip memory density.


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Developed by: Computer Centre, Dr. B.R. Ambedkar National Institute of Technology, Jalandhar