I-Chip, (Conducted On-09-12-2021 to 09-01-2022)

I-Chip is a Verilog-based event where participants learn to design, simulate, validate, and debug digital systems ranging from simple flip-flops to complex microprocessors using Hardware Description Language.

The event allows learning Verilog HDL and working with FPGA Boards.

The participants are taught the Vivado simulator's usage for behavioral and timing simulations of these systems, a crucial asset for any Hardware Design & Verification Engineer.